STMicroelectronics to advance next-generation chip manufacturing technology
Press Release, 19 September 2025
What if the next smartphone, electric car, or even your smartwatch could be faster, smaller, and more energy-efficient—all thanks to how its chips are packaged? That’s exactly what STMicroelectronics (NYSE: STM) is working on with its latest breakthrough in Panel-Level Packaging (PLP) technology.
The semiconductor giant just revealed details of a new $60M pilot line in Tours, France, set to go live by Q3 2026. And make no mistake—this isn’t just another factory update. It’s a game-changing leap in how chips are built, tested, and integrated into the devices we rely on every day.
What Is Panel-Level Packaging and Why Does It Matter?
For decades, the semiconductor world has leaned on wafer-level packaging and flip-chip technology to connect chips to devices. But as gadgets get smaller and demand skyrockets, those methods are hitting their limits. Enter Panel-Level Packaging (PLP).
Instead of working with traditional circular wafers, PLP uses large rectangular panels—think 700x700mm giant boards—to package multiple integrated circuits (ICs) at once. The result?
- ⚡ Faster production: More chips processed in one go.
- 💰 Lower costs: Economies of scale kick in for high-volume manufacturing.
- 📱 Smaller, more powerful devices: Better integration means lighter, sleeker electronics.
And here’s the kicker: ST isn’t just doing PLP—it’s pushing the frontier with Direct Copper Interconnect (DCI), which replaces old-school solder bumps with direct copper links. That means:
- 🔋 Less power loss
- 🌡 Better heat dissipation
- 📏 Miniaturization without performance trade-offs
- 🚗 Support for advanced System-in-Package (SiP) solutions across automotive, industrial, and consumer devices
STMicroelectronics’ Big Bet on Tours, France
“The development of our PLP capabilities in our Tours site is aimed at advancing this innovative approach to chip packaging and test manufacturing technology, boosting efficiency and flexibility so it can be rolled out across a wide portfolio of applications, including RF, analog, power and microcontrollers,” said Fabio Gualandris, President Quality, Manufacturing and Technology of STMicroelectronics.
The company already runs a high-volume PLP line in Malaysia, producing over 5 million units per day. Now, with this $60 million capital investment in Tours, ST is not only strengthening its European manufacturing footprint but also collaborating with the CERTEM R&D center to build an ecosystem around next-gen chip integration.
Why This Move Matters for the Industry
This isn’t just about faster chips—it’s about reshaping the global electronics supply chain.
- 🌍 European leadership: With the push for semiconductor sovereignty in Europe, ST’s Tours site becomes a critical hub.
- 🚙 Automotive growth: Chips for EVs, ADAS, and power management will benefit directly from PLP advances.
- 📶 Consumer tech: Smartphones, wearables, and IoT devices stand to gain from higher power density and miniaturization.
- 🏭 Sustainability edge: More efficient chip packaging helps reduce overall energy usage, supporting global net-zero goals.
By 2026, expect to see PLP-based chips powering everything from smart mobility to cloud-connected devices—a direct answer to the demand for faster, smaller, and greener technology.
