Press Release, 29 January 2026
The Indian government is stepping up efforts to build a vibrant homegrown semiconductor design ecosystem, with Union Minister Ashwini Vaishnaw highlighting significant progress under the Design Linked Incentive (DLI) Scheme. The initiative, part of the larger Semicon India Programme, aims to accelerate domestic chip design capabilities across key technology areas such as systems-on-chip, AI, telecom, power management and IoT solutions. During a recent interaction with chip design companies backed by the scheme in New Delhi, the minister underscored the government’s long-term vision to strengthen India’s position in the global semiconductor landscape by fostering innovation, talent and self-reliance.
So far, DLI-supported organisations have tapped into advanced electronic design automation (EDA) tools for more than 2.25 crore design hours, training over 67,000 students and engineers and enabling more than 1,000 startup professionals to deepen their expertise. Academic institutions have logged 122 tape-outs with 56 chips fabricated at 180-nanometre technology, while startups have marked 16 tape-outs with six chips realised at more advanced nodes as small as 12 nanometres a milestone that reflects growing design maturity in the Indian ecosystem. Alongside these achievements, Indian design teams have filed over 75 patents in academia and 10 from startups, showcasing a sharp rise in intellectual property creation.
The government plans to scale the programme further, targeting at least 50 fabless semiconductor companies in the next phase. A key focus will be on six critical design domains compute systems, RF and wireless, networking, power management, sensors and memory essential for modern electronics across sectors like automotive, defence, space and energy. Infrastructure support is also expanding, with facilities like SCL Mohali handling 180-nm chip fabrication and upcoming fabs at Dholera preparing to support advanced 28-nm node production. Looking ahead, India’s semiconductor ambitions extend to achieving design and manufacturing capabilities for up to 75 % of domestic chip needs by 2029, with future phases aiming at cutting-edge 3-nm and 2-nm technologies. The minister also announced the launch of Deep Tech Awards in 2026 to recognise innovation beyond semiconductors, including AI, biotech and space technologies.
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